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| XR-T3588/89 ...the analog plus company TM V.35 Interface Receiver/Transmitter June 1997-3 FEATURES D Compatible with ITU-T V.35 and Bell 306 Interface Requirements D TTL Input Compatibility D High Common Mode Output Voltage Range D Excellent Stability over Supply and Temperature Range D High Speed Operation (up to 10Mbps) D Individual Receive/Transmit Power Down Capability APPLICATIONS D High Speed Data Transmission Systems D Short Haul Modems D Signal Converters and Adapters D Network and Diagnostic Systems D Matrix Switches D Modem Emulators GENERAL DESCRIPTION This V.35 chip set consists of two bipolar chips, one performing a receive function, the other a transmit function according to the specification requirements laid down in Appendix 11 of the V.35 ITU-T Recommendation and Bell 306 modem interface specification. Typical applications require three transmit and receive pairs to establish the link between distant DTE's at data rates ranging from 48Kbps to 10Mbps. To conserve power (especially in the transmitter, which requires ORDERING INFORMATION Operating Temperature Range 0C to 70C 0C to 70C 0C to 70C approximately 22mA or each output stage to meet ITU-T specifications), power-down functions are included in both devices, allowing any of the three receive/transmit circuits to be disabled. All inputs and outputs are TTL compatible and designed to offer maximum versatility and performance. Both the transmitter and receiver require termination resistors external to each device, to meet the V.35 specification tolerance. Part No. XR-T3588CN XR-T3588CP XR-T3589CN Package 18 Lead 300 Mil CDIP 18 Lead 300 Mil PDIP 14 Lead 300 Mil CDIP Rev. 1.05 E1997 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017 1 XR-T3588/89 BLOCK DIAGRAM GND 1 vCC 7 vEE 9 16 17 18 VREF 1 O/P 1B O/P 1A I/P 1 TTL INPUT 4 INP vee 13 15 5 INP 14 O/B 2A VREF 2 O/P 2B I/P 2 TTL INPUT vee 10 12 6 INP 11 VREF 3 O/P 3B O/B 3A I/P 3 TTL INPUT vee SELA SELB 2 SELECTOR 3 1 2 3 BIAS 8 BIAS Figure 1. XR-T3588 Block Diagram Rev. 1.05 2 XR-T3588/89 GND 1 VCC 14 VEE 7 I/P 1B 1/P 1A 12 13 + 4 - O/P 1 I/P 2B 1/P 2A 10 11 + 5 - O/P 2 I/P 3B 1/P 13 8 9 + 6 - O/P 3 SELA SELB 2 3 3 2 Selector 1 Figure 2. XR-T3588 Block Diagram Rev. 1.05 3 XR-T3588/89 PIN CONFIGURATION GND SELA SELB I/P1 I/P2 I/P3 vCC BIAS vEE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 O/P1A O/P1B VREF1 O/P2B O/P2A VREF2 O/P3B O/P3A VREF3 GND SELA SELB O/P1 O/P2 O/P3 VEE 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC I/P1A I/P1B 1/P2A 1/P2B I/P3A I/P3B 18 Lead PDIP, CDIP (0.300") XR-T3588 14 Lead CDIP (0.300") XR-T3589 PIN DESCRIPTION FOR XR-T3588 Pin # 1 2 3 4 5 6 7 8 9 10 Symbol GND SELA SELB I/P1 I/P2 I/P3 VCC BIAS VEE VREF3 O I I I I I I Type Description Ground (0V). Channel Enable Select A Input. TTL compatible input used in conjunction with SELB to power down individual receiver channels. (see table 2). Channel Enable Select B Input. TTL compatible input used in conjunction with SELA to power down individual receiver channels (see table 2). Channel 1 Input. TTL compatible. Channel 2 Input. TTL compatible. Channel 3 Input. TTL compatible. Positive Supply (5V). Bias Current Input. DC level 1.1V nominal. Connect external resistor from pin to ground to define transmitter output current levels (Rbias 3.9k for Iout=22mA). Negative Supply (-5V). Channel 3 Voltage Regulator. Provides 3.3V regulated supply for connection of channel 3 transmit termination network (see Figure 6). If the driver is disabled, the voltage output at this pin will be Vcc - 0.7V. Channel 3 Differential Output A. Open collector current output. Current sink capability 22mA nominal (defined by Rbias). When terminated with network to VREF3 provides an output voltage with inverse phase to I/P3. DC level with TX and RX termination +/-O.275V nominal. Channel 3 Differential Output B. Open collector current output. Current sink capability 22mA nominal (defined by Rbias). When terminated with network to VREF3 provides an output voltage in phase with I/P3. DC level with TX and RX termination +/-O.275V nominal. Channel 2 Voltage Regulator. Provides 3.3V regulated supply for connection of channel 2 transmit termination network (see Figure 6). If the driver is disabled, the voltage output at this pin will be Vcc - 0.7V. Channel 2 Differential Output A. Open collector current output. Current sink capability 22mA Nominal (Defined by Rbias). When terminated with network to VREF2 provides an output voltage with inverse phase to I/P2. DC level with TX and RX termination +/-o.275V nominal. Channel 2 Differential Output B. Open collector current output. Current sink capability 22mA nominal (defined by Rbias). When terminated with network to VREF2 provides an output voltage in phase with I/P2. DC level with TX and RX termination +/-O.275V nominal. 11 O/P3A O 12 O/P3B O 13 VREF2 O 14 O/P2A O 15 O/P2B O Rev. 1.05 4 XR-T3588/89 PIN DESCRIPTION FOR XR-T3588 (CONT'D) Pin # 16 Symbol VREF1 Type O Description Channel 1 Voltage Regulator. Provides 3.3V regulated supply for connection of channel 1 transmit termination network (see Figure 6). If the driver is disabled, the voltage output at this pin will be Vcc - 0.7V. Channel I Differential Output B. Open collector current output. Current sink capability 22mA nominal (defined by Rbias). When terminated with network to VREF1 provides an output voltage in phase with I/P2. DC level with TX and RX termination +/-O.275V nominal. Channel 1 Differential Output A. Open collector current output. Current sink capability 22mA nominal (defined by Rbias). When terminated with network to VREF2 provides an output voltage with inverse phase to I/Pl. DC level with TX and RX termination +/-O.275V nominal. 17 O/Pl B O 18 O/Pl A O PIN DESCRIPTION FOR XR-T3589 Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Symbol GND SELA SELB O/P1 O/P2 O/P3 VEE I/P3B I/P3A VP2B I/P2A I/Pl B I/PlA VCC I I I I I I I I O O O Type Description Ground (0V). Channel Enable Select A Input. TTL compatible input used in conjunction with SELB to power down individual receiver channels. (see table 2). Channel Enable Select B Input. TTL compatible input used in conjunction with SELA to power down individual receiver channels (see table 2). Channel 1 Output. TTL compatible. Channel 2 Output. TTL compatible. Channel 3 Output. TTL compatible. Negative Supply (-5V). Channel 3 Differential Input B. Rin 4kL2 nominal. Should be terminated with an external network to GND (see Figure 8). Channel 3 Differential Input A. Rin 4k.Q nominal. Should be terminated with an external network to GND (see Figure 8). Channel 2 Differential Input B. Rin 4kL2 nominal. Should be terminated with an external network to GND (see Figure 8). Channel 2 Differential Input A. Rin 4kQ nominal. Should be terminated with an external network to GND (see Figure 8). Channel I Differential Input B. Rin 4k.Q nominal. Should be terminated with an external network to GND (see Figure 8). Channel I Differential Input A. Rin 4k.Q nominal. Should be terminated with an external network to GND (see Figure 8). Positive Supply (5V). Rev. 1.05 5 XR-T3588/89 XR-T3588 ELECTRICAL CHARACTERISTICS Test Conditions: VCC = 5V 5%, VEE = -5V 5%, TA = 0C to 70C Symbol Parameter Min. Typ. Max. Unit Conditions DC Electrical Characteristics VCC VEE ICC IEE lPCC IPEE VDIH IDIL IDIH IDIL VSIH VSIL ISIL ISIH VOL VOH ZS RGND IODIFF VREF AC Electrical tPLHT tPHLT tRT tFT Positive Supply Voltage Negative Supply Voltage Input Current Input Current Power Down ICC Power Down lEE High Level Input Voltage Low Level Input Voltage Input Current High Input Current Low Selector High Level Voltage Selector Low Level Voltage Selector Input Current Low Selector Input Current High Output Low Voltage Output High Voltage Source Impedance Resistance to Ground Output Current Differential Transmitter Reference Voltage Characteristics6 Input to Output Input to Output TX Rise Time TX Fall Time (see Figure 3) 25 25 10 10 50 50 20 20 ns ns ns ns 90 135 20.2 3.0 100 150 22.0 3.3 -0.91 0.85 110 165 23.8 3.6 -2.1 2 0 -0.6 50 VCC 0.6 -132 0.2 -1.0 2 0 4.75 -4.75 5 -5 86 -92 10.2 -14.0 VCC 0.8 1.0 5.25 -5.25 124 V V mA mA mA mA V V mA mA V V mA mA V V mA V 3 3 1 1 2 2 Data Inputs Data Inputs Data Inputs Data Inputs Per CCITT V.354,5,6 Per CCITT V.354,5,6 With 3.9K Bias Resistor Voltage Output Notes 1 With extemal transmit network (Figure 6) connected to each transmitter output and select A, select B both high. 2 All transmitter outputs open-circuit and select A, select B both low. 3 With extemal transmit network terminated with 100 (Figure 7). 4 Differential impedance between O/P A and O/P B. extemal transmit network (Figure 6) connected to transmitter output. 5 O/P A's and O/P Bs connected together, resistance measured to ground, extemal transmit network ((Figure 6) present. 6 O/P terminated with extemal transmit network terminated with 100 (See Figure 7). Specifications are subject to change without notice Rev. 1.05 6 XR-T3588/89 XR-T3589 ELECTRICAL CHARACTERISTICS Test Conditions: VCC = 5V 5%, VEE = -5V 5%, TA = 0C to 70C Symbol Parameter Min. Typ. Max. Unit Conditions DC Electrical Characteristics Vcc VEE ICC IEE IOH IOL VOH VOL VIN ZINO ZINT RGND VSIH VSIL lPCC IPEE tPLHR tPHLR tRR tFR Supply Voltage Supply Voltage Input Current Input Current Output High Level Current Output Low Level Current High Level Output Low Level Output Input Sensitivity Input Impedance Input Impedance Resistance to GND Select High Level Voltage Select Low Level Voltage Power Down ICC Current Power Down IEE Current Input to Output Input to Output RX Rise Time RX Fall Time -0.3 50 50 18 12 70 70 40 30 1.1 400 8 90 135 2 100 150 110 165 VCC 0.8 2.4 0.4 -1.6 40 4.75 -5.25 5 -5 40 7 5.25 -4.75 60 9 V V mA mA mA mA V V mV k V V mA mA ns ns ns ns Select A, Select B, Both Low Select A, Select B, Both High Select A, Select B, Both High VOH 2.4V VOL < 0.4V at IOH < 40mA at IOL < 1.6mA Differential2 Differential2 Per ITU-T V.351, 2 Per ITU-T V.351, 2 AC Electrical Characteristics (see Figure 4) Notes 1 I/P terminated to circuit 102 (see Figure 8.) 2 Pins 8-9, 10-11, 12-13. Specifications are subject to change without notice ABSOLUTE MAXIMUM RATINGS Supply Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Storage Temperature . . . . . . . . . . . . -65C to + 150C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . XR-T3588CN . . . . . . . . . . . . . . . . . . . 1000mW XR-T3589CN . . . . . . . . . . . . . . . . . . . . 300mW Rev. 1.05 7 XR-T3588/89 I/P O/PB O/PA 90% 10% tPLHT tPHLT tRT tFT Figure 3. Transmitter Waveforms I/P B I/P A O/P 90% 10% tPLHR tPHLR tRR tFR Figure 4. Receiver Waveforms SYSTEM DESCRIPTION XR-T3588 The function of the transmitter is to take a TTL input signal at a maximum bit rate of 1OMbps and output a balanced differential signal with a peak amplitude of 0.55V and a maximum DC offset of 0.6V. An internal buffer provides the regulated output voltage to set the mean level of the transmitters to less than 0.6V. Figure 5 shows a simplified circuit for the output stage. To meet the pulse shape and offset requirements laid down in the V.35 specification, the transmitter employs an internal temperature compensated voltage generator to provide reference voltages for both offset control and output current generation. Load resistors for the output stage, which provide the required source impedance for the transmitter, are external to the IC and are required to meet the V.35 specified tolerance. XR-T3589 The XR-T3589 Line Receiver contains three identical receive circuits to complement the XR-T3588 Line Transmitter. Received differential signals are converted into a single TTL compatible output. The input stage is designed to meet the full V.35 noise and common mode input specification. Individual receivers may be shut down to achieve power savings for applications not requiring three channels. Two TTL compatible inputs provide four combinations of transmitter configurations, as defined in table 2. If either of the select pins is left open a high state is adopted, hence with no inputs applied, all channels are powered up. However it is recommended to tie all select inputs to either GND or VCC. Rev. 1.05 8 XR-T3588/89 Transmitter 1-2-3 1-2 1 ALL ON ON ON OFF SEL A HIGH HIGH LOW LOW SEL B HIGH LOW HIGH LOW Transmitter 1-2-3 1-2 1 ALL ON ON ON OFF SEL A HIGH HIGH LOW LOW SEL B HIGH LOW HIGH LOW Table 1. Transmitter Selectors TYPICAL APPLICATIONS Table 2. Receiver Selectors Figure 9 shows a schematic for a typical application of the XR-T3588/T3589. In this application the termination resistor network is fed from the chip on-board regulator. The regulator provides a voltage of 3.3V. The major issue is the power dissipation of the XR-T3588. Following is a discussion of the power that is dissipated by the XR-T3588 when all three drivers are active simultaneously. The power used by the XR-T3588 is given by; Pd = (VCC - ICC + VEE - IEE) - 3 - (Rterm (Iterm)2) Where: VCC, ICC, VEE and IEE are the positive and negative supply voltages and currents, whose values may be found in the typical column of the DC Characteristics, Rterm is the equivalent impedance of the termination network, lterm is the current flow through the termination network. In the case of the three drivers enabled and terminated, the typical power dissipation is; Pd = (5 - 0.086 + (5 - 0.092)) - 3 - (150 - (0.022)2) = 672.2mW The junction temperature of the part is given by; Tjunction= Tambient + (qJA - Pd) where: Tjunction is junction temperature, Tambient is ambient temperature, qJA is package thermal impedance. For reliable operation, the absolute maximum junction temperature must be maintained below 150C. With a qJA for the ceramic package of 80C/W, and a maximum ambient temperature of 70C the junction temperature is; Tjunction = 70 + 80 - 0.672 = 1 34C If the device is used in an enclosure without forced cooling where the ambient temperature could approach or exceed 70C, the power dissipation of the part should be reduced for improved reliability. Figure 10 shows an implementation using an external reference voltage made with two resistors of values 180 and 360. This implementation offers the advantage of eliminating the feeding current to the termination network from the on chip reference, thereby reducing the dissipation in the XR-T3588. The formula to calculate the on chip power dissipation is now; Pd = (VCC - IGG + VEE - IEE) - 3 - ((VCC - 3.3) lterm + Rterm - (iterm)2) Where the term "3 - (VCC - 3.3) - (Iterm)" is the power previously dissipated in the XR-T3588 internal voltage regulator. The revised value of power dissipation is; Pd = (5 - 0.086) + (5 - 0.092) - 3 - ((5 - 3.3) - 0.022 + 150 - (0.022)2) = 560mW The total on chip power saving is; 3 - (5 - 3.3) - 0.022, i.e. 112.2 mW. Figure 11 shows the demo board schematic. To obtain a representative. demo board, call your local Rev. 1.05 9 XR-T3588/89 VREF 1 (3.3V Nominal) Pin 16 VREF 125 125 50 Pin 18 O/P 1A 50 Pin 17 O/P 1B 50 50 O/P A Sets Current Source Value 3.9K VEE Pin 8 Bias 22mA O/B B Figure 5. XR-T3588 Output Stage Simplified Circuit Figure 6. External Transmit Network VREF 125 I/P A I/P B 50 50 50 50 O/P A 125 100 O/P B Figure 7. XR-T3588 Output Stage Simplified Circuit Figure 8. External Receive Network Rev. 1.05 10 XR-T3588/89 Rev. 1.05 11 XR-T3588/89 Rev. 1.05 12 XR-T3588/89 18 LEAD CERAMIC DUAL-IN-LINE (300 MIL CDIP) Rev. 1.00 18 10 1 9 E D Base Plane Seating Plane L e B B1 c A1 A E1 INCHES SYMBOL A A1 B B1 c D E1 E e L MIN 0.100 0.015 0.014 0.045 0.008 0.860 0.250 MAX 0.200 0.070 0.026 0.065 0.018 0.960 0.310 MILLIMETERS MIN 2.54 0.38 0.36 1.14 0.20 21.84 6.35 MAX 5.08 1.78 0.66 1.65 0.46 24.38 7.87 0.300 BSC 0.100 BSC 0.125 0.200 7.62 BSC 2.54 BSC 3.18 5.08 15 0 15 0 Note: The control dimension is the inch column Rev. 1.05 13 XR-T3588/89 18 LEAD PLASTIC DUAL-IN-LINE (300 MIL PDIP) Rev. 1.00 18 1 D A L 10 9 E1 E A2 Seating Plane A1 B e B1 eA eB C INCHES SYMBOL A A1 A2 B B1 C D E E1 e eA eB L MIN 0.145 0.015 0.115 0.014 0.030 0.008 0.845 0.300 0.240 MAX 0.210 0.070 0.195 0.024 0.070 0.014 0.925 0.325 0.280 MILLIMETERS MIN 3.68 0.38 2.92 0.36 0.76 0.20 21.46 7.62 6.10 MAX 5.33 1.78 4.95 0.56 1.78 0.38 23.50 8.26 7.11 0.100 BSC 0.300 BSC 0.310 0.115 0 0.430 0.160 15 2.54 BSC 7.62 BSC 7.87 2.92 0 10.92 4.06 15 Note: The control dimension is the inch column Rev. 1.05 14 XR-T3588/89 14 LEAD CERAMIC DUAL-IN-LINE (300 MIL CDIP) Rev. 1.00 14 8 1 7 E D Base Plane Seating Plane L e B B1 c A1 A E1 INCHES SYMBOL A A1 B B1 c D E1 E e L MIN 0.100 0.015 0.014 0.045 0.008 0.685 0.250 MAX 0.200 0.060 0.026 0.065 0.018 0.785 0.310 MILLIMETERS MIN 2.54 0.38 0.36 1.14 0.20 17.40 6.35 MAX 5.08 1.52 0.66 1.65 0.46 19.94 7.87 0.300 BSC 0.100 BSC 0.125 0.200 7.62 BSC 2.54 BSC 3.18 5.08 15 0 15 0 Note: The control dimension is the inch column Rev. 1.05 15 XR-T3588/89 NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 1997 EXAR Corporation Datasheet June 1997 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Rev. 1.05 16 |
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